Guide to RISC Processors

For Programmers and Engineers
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Here is an accessible, comprehensive guide to all the popular modern RISC (Reduced Instruction Set Computer) processors: MIPS, SPARC, PowerPC, ARM and Itanium. It details RISC design principles as well as explains the differences between RISC and CISC designs. It also covers MIPS assembly language programming. Professionals and programmers seeking an authoritative and practical overview of RISC processors will find the guide an essential resource.
Part I--OVERVIEW: Introduction Processor design issues RISC principles Part II--ARCHITECTURES: MIPS architecture SPARC architecture PowerPC architecture Itanium architecture ARM architecture Part III--MIPS ASSEMBLY LANGUAGE: SPIM simulator and debugger Assembly language overview Procedures and the stack Addressing modes Arithmetic instructions Conditional execution Logical and shift operations Recursion Floating-point operations Appendixes: Number Systems Character Representation MIPS Instruction Set Summary Programming Exercises Bibliography Index
Details RISC design principles as well as explains the differences between this and other designs.Helps readers acquire hands-on assembly language programming experience
Autor: Sivarama P. Dandamudi
ISBN-13:: 9780387210179
ISBN: 0387210172
Erscheinungsjahr: 01.10.2004
Verlag: Springer-Verlag GmbH
Gewicht: 866g
Seiten: 387
Sprache: Englisch
Auflage 1
Sonstiges: Buch, 241x184x24 mm, 80 illustrations, 5 tables